apeNEXT: the future	Schifano S. Fabio - INFN

Consider the following data about PCs and custom processors

• 1Ghz FPU ==> 2 Gflops double precision

• 5 Tflops ==> to assemble ~2500 PCs

• 1Ghz FPU ==> ~30W power dissipation

• 200 Mhz FPU (8C ops/cycle) ==> 1,6 Gflops double precision

• 5 Tflops ==> to assemble ~3000 nodes

• 200 Mhz FPU ==> 4W power consuption

It's our opinion that:

• system with O(100) nodes can be realized using PCs

• system with O(1000) nodes needs custon processors

Both solution share the need of a fast and low latency interconnection structure, our main target is required by both alternatives.